The present claimed invention relates to the field of flat panel displays. More particularly, the present claimed invention relates to a method for forming an electrode structure for a flat panel display.
Display devices such as, for example, flat panel display devices typically utilize a cathode structure that is formed over a backplate. The cathode structure includes row electrodes and column electrodes that are used to activate regions of field emitters. The field emitters emit electrons that are directed towards respective pixel or sub-pixel regions on a faceplate. By selectively activating row electrodes and column electrodes, electrons are emitted that strike the respective pixel or sub-pixel regions on the faceplate. Typically, phosphors are coated on the inside of the faceplate. The electrons strike the phosphors, producing red, green or blue visible light that forms a visible display.
In prior art processing techniques, aluminum is commonly used for forming row electrodes and column electrodes. However, aluminum is subject to hillock formation. Hillock formation results in nonuniform planarization and can cause both row and column shorts to occur.
In one recent prior art process a layer of tantalum is deposited over the aluminum layer for reducing hillock formation. However, the resulting structure has a conductivity that is too low for use in large flat panel display devices. That is, though this process is sufficient for making small flat panel displays, the resulting row or column has too high a resistivity to be used in making large flat panel displays.
In prior art processes that use a layer of aluminum that is overlain by a layer of tantalum, the layer of aluminum is first deposited by placing the backplate into a sputtering chamber. Once the aluminum layer deposition is complete, the backplate is removed from the sputtering chamber. The layer of aluminum is then masked. More particularly, photoresist is deposited over the backplate, and the photoresist is exposed. The layer of aluminum is then etched using a wet etch process to form the desired aluminum structure.
The backplate is then placed into a second sputtering chamber that deposits the tantalum layer. Once the deposition of the tantalum layer is complete, the backplate is removed from the second sputtering chamber. The layer of tantalum is then masked. More particularly, photoresist is deposited over the backplate, and the photoresist is exposed. The tantalum layer is then etched. Because wet etch processes are not effective for etching tantalum, prior art processes must use a dry etch process. In one recent prior art process a reactive ion etch is used for etching the tantalum layer.
The use of two separate sputtering deposition steps is expensive and time consuming. Also, the use of two separate masking process steps is expensive and time consuming. These factors result in a low manufacturing yield and throughput. In addition, the steepness of the row electrodes and column electrodes of prior art processes results in manufacturing defects related to cracking of the overlying tantalum layer.
The dry etch process is complex. Also, the use of a dry etch process is expensive as it requires the use of expensive capital equipment (e.g. reactive ion etcher). Moreover, the dry etch process is corrosive to aluminum and can result in corrosion of the aluminum layer when pinholes are present in the tantalum layer. In addition, the dry etch process forms polymers within the tantalum layer. Thus, following the dry etch, a polymer strip process is required for removing the polymers. The polymer strip process is expensive. In addition, the corrosive dry etch process can result in pinholes in the glass backplate.
During subsequent conventional process steps, the column electrode is subjected to potential damage. More particularly damage often results from, ion bombardment, cavity etch, cone deposition, dielectric deposition, masking and etching of the dielectric layer, deposition and etch of a molybdenum layer, deposition and etch of a chromium layer, polyimide deposition, etc. These process steps lead to shorts and opens that result in reduced yield and device failure.
Another problem that occurs in prior art devices is column to focus waffle shorts. These column to focus waffle shorts lead to reduced yield and device failure. In addition, the electrodes used in prior art column electrodes can react with the frit seal in the frit seal region, leading to shorts between column electrodes.
Thus, a need exists for an electrode structure and a method for forming an electrode structure that does not result in hillock formation. Still another need exists for an electrode structure and a method for forming an electrode structure that meets the above-listed needs but which does not produce undesired electrical shorts or opens in the cathode structure. Still another need exists for an electrode structure and a method for forming an electrode structure that meets the above-listed needs and that is inexpensive to manufacture and that does not result in reduced yield.
The present invention provides an electrode structure and a method for forming an electrode structure that does not result in hillock formation. Also, the present invention provides an electrode structure and a method for forming an electrode structure that meets the above-listed need but which does not produce undesired electrical shorts or opens in the cathode structure. Also, the present invention provides an electrode structure and a method for forming an electrode structure that meets the above-listed needs and that is inexpensive and that increases yield and throughput.
In one embodiment of the present invention, an electrode structure for a flat panel display is shown that includes lower electrodes and upper electrodes. In the present embodiment, the lower electrodes are row electrodes and the upper electrodes are column electrodes. The lower electrodes and the upper electrodes are separated by a resistive layer and a dielectric layer. In one embodiment, both the upper electrodes and the lower electrodes are formed of a metal alloy. In one embodiment, the metal alloy is an aluminum alloy. Alternatively, a silver alloy is used.
A method for forming an electrode structure of a flat panel display is disclosed. First, a metal alloy layer is deposited over a backplate. A cladding layer is then deposited over the metal alloy layer. A wet etch step is then performed so as to form a layer of electrodes. By performing the deposition of the metal alloy layer and the cladding layer in the same sputtering tool sequentially, cost savings, increased yield and throughput result as compared to prior art processes that require two separate trips to a sputtering tool. Moreover, because a single masking step and a single wet etch is required, significant cost savings, increased yield and throughput result as compared to prior art processes that require two separate masking steps and etch steps.
The present invention does not use a dry etch process. Thus, significant cost savings are realized because there is no need for complex and expensive capital equipment for performing the dry etch process. In addition, because the present invention does not use a dry etch process, there is no corrosion of an underlying aluminum layer and no damage (e.g. pinholes) to the glass backplate. Moreover, because the present invention does not use a dry etch process, there is no need to perform a polymer strip process. This results in further time and cost savings as compared to prior art processes and increased throughput and yield.
In one embodiment, a passivation layer is deposited over the upper electrode. In the present embodiment, the passivation layer is silicon nitride. The silicon nitride layer is then masked and etched. The resulting silicon nitride structure partially covers the upper electrodes. This protects the upper electrodes during subsequent process steps.
Gate metal is then deposited, masked and etched to form a gate structure. The passivation layer protects the upper electrodes during deposition, mask and etch steps. Conventional process steps are then used to complete the cathode structure. In one embodiment of the present conventional process steps are used to form emitters and to form a focusing structure. In the present embodiment, these process steps include ion bombardment, cavity etch, cone deposition, dielectric deposition, masking and etching of the dielectric layer, deposition and etch of molybdenum layer, deposition and etch of chromium layer, polyimide deposition, etc. During these process steps, the upper electrodes are protected by the passivation layer. Thus, damage to upper electrodes is prevented. By preventing damage to upper electrodes, column shorts and opens are reduced. Also, because there is less exposed metal alloy, column to focus waffle shorts are decreased.
The use of either an aluminum alloy or the use of a silver alloy provides good conductivity. The resulting conductivity is sufficient for fabrication of large flat panel displays. In addition, the present invention prevents hillock formation as occurs in prior art processes that use aluminum. Thus, electrical shorts and opens are prevented as compared with prior art processes that use aluminum and good planarity of overlying layers is obtained. This results in increased yield as compared with prior art processes that use aluminum.
Thus, the present invention provides an electrode structure and a method for forming an electrode structure that does not result in hillock formation. Also, the present invention provides an electrode structure and a method for forming an electrode structure that meets the above-listed need but which does not produce undesired electrical shorts or opens in the cathode structure. Also, the present invention provides an electrode structure and a method for forming an electrode structure that meets the above-listed needs, that is inexpensive and that increases yield and throughput.
These and other objects and advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various drawing figures.